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VTI Technologies has developed a new manufacturing technology that combines MEMS and ASIC technology to create sensors that are more compact, smarter and significantly lower cost for mass production. VTI has completed this work, which will open a new page for sensing applications for all types of handheld devices.
One of the challenges of sensing technology is to combine MEMS with different requirements with traditional wafer-level circuits. In the first phase of research and development, VTI has proven a way to use existing production techniques to make smaller, lower cost sensing devices. In the second phase, VTI is looking for new manufacturing processes to enable more complex sensors to achieve the benefits of low-cost mass production and miniaturization through wafer-level integration.
After successfully completing the first phase of work this year, VTI demonstrated the potential for heterogeneous integration. This approach preserves the advantages of MEMES devices and ASICs fabricated on separate wafers, allowing all of the testing to be done prior to wafer level integration. According to this Chip-on-MEMS manufacturing technology, a thin ASIC chip needs to be embedded in the appropriate location of the MEMS wafer. MEMS wafers use redistribution and isolation layer technology, which are externally connected by solder joints before joining the ASIC, after which the MEMS and ASIC chips are isolated by a passivation layer.
Heikki Kuisma, vice president of the VTI R&D Center, said: "This is an important step towards reducing the cost and size of mass-produced sensing technology equipment. The verification component area is only 4mm2 and the height is less than 1mm. Its construction and testing have proven successful. One technology is correct. Since Chip-on-MEMS technology is an extension of wafer shop processing, it can only be a big step from traditional packaging. Even the final test and calibration are now wafer processing. The way. The potential of this new integrated technology is that the size of MEMS devices can be reduced to one-third today.
After the advantages of this integration technology have been proven, VTI is now turning to the development of new manufacturing technologies and processes to integrate MEMS sensing components with several ASIC chips to create more complex sensing components. The goal is to provide smart sensing devices with more input/output capabilities, such as onboard microprocessing and wireless communication. This ambitious research effort includes the stacking of several ASIC chips approximately 20 microns thick at the top of MEMS devices through heterogeneous integration techniques. These innovative manufacturing technologies will ultimately lay the foundation for the birth of a new generation of small sensing devices for high volume, low cost applications.
One of the challenges of sensing technology is to combine MEMS with different requirements with traditional wafer-level circuits. In the first phase of research and development, VTI has proven a way to use existing production techniques to make smaller, lower cost sensing devices. In the second phase, VTI is looking for new manufacturing processes to enable more complex sensors to achieve the benefits of low-cost mass production and miniaturization through wafer-level integration.
After successfully completing the first phase of work this year, VTI demonstrated the potential for heterogeneous integration. This approach preserves the advantages of MEMES devices and ASICs fabricated on separate wafers, allowing all of the testing to be done prior to wafer level integration. According to this Chip-on-MEMS manufacturing technology, a thin ASIC chip needs to be embedded in the appropriate location of the MEMS wafer. MEMS wafers use redistribution and isolation layer technology, which are externally connected by solder joints before joining the ASIC, after which the MEMS and ASIC chips are isolated by a passivation layer.
Heikki Kuisma, vice president of the VTI R&D Center, said: "This is an important step towards reducing the cost and size of mass-produced sensing technology equipment. The verification component area is only 4mm2 and the height is less than 1mm. Its construction and testing have proven successful. One technology is correct. Since Chip-on-MEMS technology is an extension of wafer shop processing, it can only be a big step from traditional packaging. Even the final test and calibration are now wafer processing. The way. The potential of this new integrated technology is that the size of MEMS devices can be reduced to one-third today.
After the advantages of this integration technology have been proven, VTI is now turning to the development of new manufacturing technologies and processes to integrate MEMS sensing components with several ASIC chips to create more complex sensing components. The goal is to provide smart sensing devices with more input/output capabilities, such as onboard microprocessing and wireless communication. This ambitious research effort includes the stacking of several ASIC chips approximately 20 microns thick at the top of MEMS devices through heterogeneous integration techniques. These innovative manufacturing technologies will ultimately lay the foundation for the birth of a new generation of small sensing devices for high volume, low cost applications.
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